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general description the MAX17005/max17006/max17015 are high-frequen- cy multichemistry battery chargers. these circuits fea- ture a new high-frequency current-mode architecture that significantly reduces component size and cost*. the charger uses a high-side mosfet with n-channel synchronous rectifier. widely adjustable charge current, charge voltage, and input current limit simplify the con- struction of highly accurate and efficient chargers. the charge voltage and charge current are set with analog control inputs. the charge current setting can also be adjusted with a pwm input. high-accuracy cur- rent-sense amplifiers provide fast cycle-by-cycle cur- rent-mode control to protect against short circuits to the battery and respond quickly to system load transients. in addition, the charger provides a high-accuracy ana- log output that is proportional to the adapter current. in the max17015, this current monitor remains active when the adapter is absent to monitor battery dis- charge current. the MAX17005 charges three or four li+ series cells, and the max17006 charges two or three li+ series cells. the max17015 adjusts the charge voltage setting and the number of cells through a feedback resistor- divider from the output. all variants of the charger can provide at least 4a of charge current with a 10m sense resistor. the charger utilizes a charge pump to control an n-channel adapter selection switch. the charge pump remains active even when the charger is off. when the adapter is absent, a p-channel mosfet selects the battery. the MAX17005/max17006/max17015 are available in a small, 4mm x 4mm x 0.8mm 20-pin, lead-free tqfn package. an evaluation kit is available to reduce design time. applications notebook computers tablet pcs portable equipment with rechargeable batteries features ? high switching frequency (1.2mhz) ? controlled inductor current-ripple architecture reduced bom cost small inductor and output capacitors ? 0.4% accurate charge voltage ? 2.5% accurate input-current limiting ? 3% accurate charge current ? single-point compensation ? monitor outputs for 2.5% accurate input current limit 2.5% battery discharge current (max17015 only) ac adapter detection ? analog/pwm adjustable charge-current setting ? battery voltage adjustable for 3 and 4 cells (MAX17005) or 2 and 3 cells (max17006) ? adjustable battery voltage (4.2v to 4.4v/cell) ? cycle-by-cycle current limit battery short-circuit protection fast response for pulse charging fast system-load-transient response ? programmable charge current < 5a ? automatic system power source selection with n-channel mosfet ? internal boost diode ? +8v to +26v input voltage range MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers ________________________________________________________________ maxim integrated products 1 ordering information 19-4041; rev 0; 2/08 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available + denotes a lead-free package. part temp range pin- package pkg code MAX17005 etp+ -40 c to +85 c 20 thin qfn (4mm x 4mm) t2044-3 max17006 etp+ -40 c to +85 c 20 thin qfn (4mm x 4mm) t2044-3 max17015 etp+ -40 c to +85 c 20 thin qfn (4mm x 4mm) t2044-3 pin configuration and minimal operating circuit appear at end of data sheet. * patent pending.
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 1, v dcin = v cssp = v cssn = 19v, v batt = v csip = v csin = 16.8v, v vctl = v aa , v iset = 1v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25c.) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dcin, cssp, cssn, batt, csin, csip, acok, lx to agnd .......................................................-0.3v to +30v bst to ldo.............................................................-0.3v to +30v csip to csin, cssp to cssn .............................. -0.3v to +0.3v iinp, fb, acin to agnd.............................-0.3v to (v aa + 0.3v) v aa , ldo, iset, vctl, cc to agnd .......................-0.3v to +6v dhi to lx ....................................................-0.3v to (bst + 0.3v) bst to lx..................................................................-0.3v to +6v dlo to pgnd ............................................-0.3v to (ldo + 0.3v) pgnd to agnd .................................................... -0.3v to +0.3v continuous power dissipation (t a = +70c) 16-pin tqfn (derate 16.9mw/c above +70c)....1349.1mw operating temperature range ...........................-40c to +85c junction temperature ......................................................+150c storage temperature range .............................-60c to +150c lead temperature (soldering, 10s) .................................+300c parameter conditions min typ max units charge-voltage regulation 2 cells, v vctl = gnd (for max17006) 8.3664 8.40 8.4336 3 cells, v vctl = v aa (for MAX17005 and max17006) 12.549 12.60 12.651 4 cells, v vctl = gnd (for MAX17005) 16.733 16.80 16.867 battery regulation-voltage accuracy fb accuracy using fb divider (for max17015) (note 1) 2.0916 2.1 2.1084 v fb input bias curent -1 +1 a 2 cells (for max17006), 4 cells (for MAX17005) 0.0 v aa /2 -0.2 vctl range 3 cells (for MAX17005 and max17006) v aa /2 +0.2 v aa v vctl gain v cell /v vctl 5.85 6 6.15 v/v vctl input bias current v vctl = gnd and vctl = v aa -1 +1 a charge-current regulation iset range 0.0 v aa /2 v iset = 1.4v 80 iset full-scale setting iset = 99.9% duty cycle 60 mv 58.2 60 61.8 mv v iset = v aa /4 or iset = 99.9% duty cycle -3 +3 % 38.2 40 41.8 mv full-charge current accuracy (csip to csin) v iset = v aa /6 or iset = 66.7% duty cycle -4.5 +4.5 % 1.4 3 4.6 mv trickle charge-current accuracy v batt = 1v to 16.8v v iset = v aa /80 or iset = 5% duty cycle -52 +52 % charge-current gain error based on v iset = v vaa /4 and v iset = v vaa /80 -2 +2 % charge-current offset error based on v iset = v vaa /4 and v iset = v vaa /80 -1.4 +1.4 mv batt/csip/csin input voltage range 0 24 v iset falling 21 26 31 iset power-down mode threshold iset rising 33 40 47 mv
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers _______________________________________________________________________________________ 3 parameter conditions min typ max units v iset = 3v -0.2 +0.2 iset input bias current cssn = batt, v iset = 5v -0.2 +0.2 a rising 2.4 iset pwm threshold falling 0.8 v iset frequency 0.128 500 khz iset effective resolution f pwm =3.2mhz 8 bits input-current regulation 58.5 60 61.5 mv input current-limit threshold v cssp - v cssn -2.5 +2.5 % cssn input bias current adapter present -0.1 +0.1 a cssp/cssn input-voltage range 8.0 26.0 v iinp transconductance v cssp - v cssn = 60mv 2.66 2.8 2.94 a/mv v cssp - v cssn = 60mv, v iinp = 0v to 4.5v -2.5 +2.5 iinp accuracy v cssp - v cssn = 35mv -2.5 +2.5 % supply and linear regulator dcin input voltage range 8 26 v dcin falling 7.9 8.1 dcin undervoltage-lockout (uvlo) trip-point dcin rising 8.7 8.9 v adapter present (note 2) 3 6 ma dcin + cssp + cssn quiescent current adapter absent (note 2) 30 50 a adapter absent (note 2) 10 20 v batt = 16.8v charger shutdown (note 2) 10 20 batt + csip + csin + lx input current v batt = 2v to 19v, adapter present (note 2) 200 500 a ldo output voltage 8.0v < v dcin < 26v, no load 5.15 5.35 5.55 v ldo load regulation 0 < i ldo < 40ma 100 200 mv ldo uvlo threshold 3.2 4.1 5.0 v references v aa output voltage i vaa = 50a 4.18 4.20 4.22 v v aa uvlo threshold v aa falling 3.1 3.9 v acin acin threshold 2.058 2.1 2.142 v acin threshold hysteresis 10 20 30 mv acin input bias current -1 +1 a acok acok sink current v acok = 0.4v, v acin = 1.5v 6 ma acok leakage current v acok = 5.5v, v acin = 2.5v 1 a electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 19v, v batt = v csip = v csin = 16.8v, v vctl = v aa , v iset = 1v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25c.)
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 4 _______________________________________________________________________________________ parameter conditions min typ max units switching regulator dhi off-time k factor v dcin = 19v, v batt = 10v 0.029 0.030 0.041 s/v sense voltage for minimum discontinuous mode ripple current v csip - v csin 10 mv zero-crossing comparator threshold v csip - v csin 10 mv cycle-by-cycle current-limit sense voltage v csip - v csin 105 110 115 mv dhi resistance high i dlo =10ma 1.5 3 dhi resistance low i dlo = -10ma 0.8 1.75 dlo resistance high i dlo = 10ma 3 6 dlo resistance low i dlo = -10ma 3 7 adapter detection adapter absence-detect threshold v dcin - v batt , v dcin falling +70 +120 +170 mv adapter detect threshold v dcin - v batt, v dcin rising +360 +420 +580 mv adapter switch charge-pump frequency charger shutdown 180 200 220 hz dlo 0.04 0.1 0.20 adapter switch charge-pump refresh pulse dhi 0.07 0.15 0.30 s electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 19v, v batt = v csip = v csin = 16.8v, v vctl = v aa , v iset = 1v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25c.) electrical characteristics (circuit of figure 1, v dcin = v cssp = v cssn = 19v, v batt = v csip = v csin = 16.8v, v vctl = v aa , v iset = 1v, t a = -40? to +85? , unless otherwise noted.) parameter conditions min typ max units charge-voltage regulation 2 cells, v vctl = gnd (for max17006) 8.366 8.433 3 cells, v vctl = v aa (for MAX17005 and max17006) 12.549 12.651 4 cells, v vctl = gnd (for MAX17005) 16.73 16.86 battery regulation-voltage accuracy fb accuracy using fb divider (for max17015) (note 1) 2.091 2.108 v 2 cells (for max17006), 4 cells (for MAX17005) 0.0 v aa /2 - 0.2 vctl range 3 cells (for MAX17005 and max17006) v aa /2 + 0.2 v aa v vctl gain v cell /v vctl 5.85 6.15 v/v
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers _______________________________________________________________________________________ 5 electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 19v, v batt = v csip = v csin = 16.8v, v vctl = v aa , v iset = 1v, t a = -40? to +85? , unless otherwise noted.) parameter conditions min typ max units charge-current regulation iset range 0.0 v aa /2 v 57.5 62.5 mv v iset = v aa /4 or iset = 99.9% duty cycle -4.2 +4.2 % 38 42 mv full charge-current accuracy (csip to csin) v iset = v aa /6 or iset = 66.7% duty cycle -5 +5 % 1.4 4.6 mv trickle charge-current accuracy v batt = 1v to 16.8v v iset = v aa /80 or iset = 5% duty cycle -52 +52 % charge-current gain error based on v iset = v vaa /4 and v iset = v vaa /80 -2 +2 % charge-current offset error based on v iset = v vaa /4 and v iset = v vaa /80 -1.4 +1.4 mv batt/csip/csin input voltage range 0 24 v iset falling 21 31 iset power-down mode threshold iset rising 33 47 mv rising 2.4 iset pwm threshold falling 0.8 v iset frequency 0.128 500 khz input-current regulation 58.2 61.8 mv input current-limit threshold v cssp - v cssn -3 +3 % cssn input bias current adapter present -2 +2 a cssp/cssn input-voltage range 8.0 26.0 v iinp transconductance v cssp - v cssn = 60mv 2.66 2.94 a/mv v cssp - v cssn = 60mv, v iinp = 0v to 4.5v -2.5 +2.5 iinp accuracy v cssp - v cssn = 35mv -2.5 +2.5 % supply and linear regulator dcin input-voltage range 8 26 v dcin falling 7.9 dcin uvlo trip-point dcin rising 8.9 v adapter present (note 2) 6 ma dcin + cssp + cssn quiescent current adapter absent (note 2) 50 a adapter absent (note 2) 20 v batt = 16.8v charger shutdown (note 2) 20 batt + csip + csin + lx input current v batt = 2v to 19v, adapter present (note 2) 500 a ldo output voltage 8.0v < v dcin < 26v, no load 5.15 5.55 v ldo load regulation 0 < i ldo < 40ma 200 mv ldo uvlo threshold 3.2 5.0 v
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 6 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 1, v dcin = v cssp = v cssn = 19v, v batt = v csip = v csin = 16.8v, v vctl = v aa , v iset = 1v, t a = -40? to +85? , unless otherwise noted.) parameter conditions min typ max units references vaa output voltage i vaa = 50a 4.18 4.22 v vaa uvlo threshold v aa falling 3.9 v acin acin threshold 2.058 2.142 v acin threshold hysteresis 10 30 mv acok acok sink current v acok = 0.4v, v acin = 1.5v 6 ma switching regulator dhi off-time k factor v dcin = 19v, v batt = 10v 0.029 0.041 s/v cycle-by-cycle current-limit sense voltage v csip - v csin 105 115 mv dhi resistance high i dlo = 10ma 3 dhi resistance low i dlo = -10ma 1.75 dlo resistance high i dlo = 10ma 6 dlo resistance low i dlo = -10ma 7 adapter detection adapter absence-detect threshold v dcin - v batt , v dcin falling +70 +170 mv adapter detect threshold v dcin - v batt, v dcin rising +320 +620 mv adapter switch charge-pump frequency 180 220 hz dlo 0.04 0.2 adapter switch charge-pump refresh pulse dhi 0.07 0.3 s note 1: accuracy does not include errors due to external resistance tolerances. note 2: adapter present conditions are tested at v dcin = 19v and v batt = 16.8v. adapter absent conditions are tested at v dcin = 16v, v batt = 16.8v.
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers _______________________________________________________________________________________ 7 typical operating characteristics (circuit of figure 1, adapter = 19v, battery = 10v, iset = 1.05v, v ctl = gnd, t a = +25 c, unless otherwise noted.) iinp dc error vs. system current MAX17005 toc01 system current (a) iinp error (%) 4 3 12 -8 -6 -4 -2 0 2 4 6 8 10 -10 05 iinp error vs. system current MAX17005 toc02 system current (a) iinp error (%) 4.0 3.5 2.5 3.0 1.0 1.5 2.0 0.5 -8 -6 -4 -2 0 2 4 6 8 10 -10 04.5 v batt = 16.8v v batt = 8.4v v batt = 12.6v iset pwm duty-cycle change MAX17005 toc03 duty cycle charge-current error (%) 0.8 0.9 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.5 1.0 1.5 2.0 2.5 3.0 0 01.0 iset pwm duty-cycle change MAX17005 toc04 duty cycle charge current (a) 80 90 10 20 30 40 50 60 70 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 0100 iset pwm frequency sweep MAX17005 toc05 frequency (khz) charge-current error (%) 600 700 100 200 300 400 500 0.5 1.0 1.5 2.0 2.5 3.0 0 0 800 duty cycle = 75% duty cycle = 25% battery voltage-setting error MAX17005 toc06 vctl (v) battery voltage error (%) 3.0 3.5 4.0 0.5 1.0 1.5 2.0 2.5 -0.5 -0.4 -0.3 -0.2 -0.1 0 -0.6 04.5 system load transient MAX17005 toc07 200 s/div system current 5a/div charging current 5a/div inductor current 5a/div efficiency vs. charge current MAX17005 toc08 charge current (a) efficiency (%) 2.5 3.0 3.5 0.5 1.0 1.5 2.0 70 65 75 80 85 95 90 100 60 04.0 2 cells 3 cells 4 cells
v aa load regulation MAX17005 toc11 load current (ma) v aa voltage (v) 0.8 0.2 0.4 0.6 4.197 4.196 4.198 4.200 4.199 4.201 4.203 4.202 4.205 4.204 4.195 01.0 MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 8 _______________________________________________________________________________________ ldo load regulation MAX17005 toc09 ldo current (ma) ldo voltage (v) 35 51015202530 5.35 5.40 5.45 5.50 5.30 040 ldo line regulation MAX17005 toc10 input voltage (v) ldo voltage (v) 24 22 10 12 14 16 18 20 5.35 5.40 5.45 5.50 5.30 826 v aa vs. temperature MAX17005 toc12 temperature ( c) v aa (v) 60 80 -40 -20 0 20 40 4.1970 4.1980 4.1975 4.1985 4.1995 4.1990 4.2005 4.2000 4.1965 -60 100 high-side mosfet off-time and switching frequency vs. battery voltage MAX17005 toc13 battery voltage (v) switching frequency (mhz) high-side mosfte off-time ( s) 16 14 10 12 468 2 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 6 5 4 3 2 1 0 0 018 v in = 20v high-side mosfet off-time switching frequency adapter removal MAX17005 toc16 200ms/div 5.00v 5.00v 5.00v adapter current vs. adapter voltage MAX17005 toc14 adapter voltage (v) adapter current (ma) 15 510 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 020 battery leakage MAX17005 toc15 battery voltage (v) battery leakage current ( a) 14 16 18 68 2 4 10 12 50 100 150 200 250 300 350 400 0 020 typical operating characteristics (continued) (circuit of figure 1, adapter = 19v, battery = 10v, iset = 1.05v, v ctl = gnd, t a = +25 c, unless otherwise noted.)
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers _______________________________________________________________________________________ 9 pin description pin name function 1 dcin charger bias supply input. bypass dcin with a 1f capacitor to pgnd. 2 agnd analog ground 3 csip output current-sense positive input. connect a current-sense resistor from csip to csin. 4 csin output current-sense negative input 5 iinp input current-monitor output. iinp sources the current proportional to the current sensed across cssp and cssn. the transconductance from (cssp - cssn) to iinp is 2.8a/mv. see the analog input current-monitor output section to configure the current monitor for a particular gain setting. 6 batt battery voltage feedback input 7 acok ac detect output. this open-drain output is high impedance when acin is lower than v aa /2. connect a 10k pullup resistor from ldo to acok . 8 cssp input current sense for positive input. connect a current-sense resistor from cssp to cssn. 9 cssn input current-sense negative input 10 iset dual mode? input for setting maximum charge current. iset can be configured either with a resistor voltage-divider or with a pwm signal from 128hz to 500khz. if there is no clock edge within 20ms, iset defaults to analog input mode. pull iset to gnd to shut down the charger. in the max17015, when the adapter is absent, drive iset above 1v to enable iinp during battery discharge. when the adapter is reinserted, iset must be released to the correct control level within 300ms. 11 pgnd power ground connection for mosfet drivers 12 dlo low-side power-mosfet driver output. connect to low-side n-channel mosfet gate. 13 ldo linear regulator output. ldo provides the power to the mosfet drivers. ldo is the output of the 5.4v linear regulator supplied from dcin. bypass ldo with a 4.7f ceramic capacitor from ldo to pgnd. 14 bst high-side driver supply. connect a 0.68f capacitor from bst to lx. 15 dhi high-side power-mosfet driver output. connect to high-side n-channel mosfet gate. 16 lx high-side driver source connection. connect a 0.68f capacitor from bst to lx. 17 acin ac adapter detect input. acin is the input to an uncommitted comparator. 18 v aa 4.2v voltage reference and device power-supply input. bypass v aa with a 1f capacitor to gnd. 19 cc voltage regulation loop-compensation point. connect 3k and 0.01f capacitor in series from cc to gnd. 20 vctl battery voltage adjust input. vctl sets the number of cells and adjusts the voltage per cell. the adjustment range is 4.2v to 4.4v per cell. see the setting charge voltage section . bp backside paddle. connect the backside paddle to analog ground. dual mode is a trademark of maxim integrated products, inc.
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 10 ______________________________________________________________________________________ batt adapter bst cssp cssn dhi lx dlo pgnd rs1 15m csin csip batt battery cc vctl iset ldo gnd iinp v aa adapter pwm signal r1 22.6k c4 0.68 f c2 0.1 f c5 0.01 f r2 r3 r4 200k r5 3k r6 200k c in c out rs2 10m n1 n2 n3 n4 q1b c3 1 f c1 4.7 f r7 r8 only for max17015 l1 system load d1 c6 1 f c in = 2 x 4.7 f c out = 4.7 f l1 = 2 h r9 2m q1a dcin c7 0.1 f r acin1 r acin2 acin acok ldo 10k MAX17005 max17006 max17015 figure 1. typical operating circuit detailed description the MAX17005/max17006/max17015 include all the functions necessary to charge li+, nimh, and nicd batteries. an all n-channel synchronous-rectified step- down dc-dc converter is used to implement a preci- sion constant-current, constant-voltage charger. the charge current and input current-limit sense amplifiers have low-input offset errors (250v typ), allowing the use of small-valued sense resistors. the MAX17005/max17006/max17015 use a new ther- mally optimized high-frequency architecture. with this new architecture, the switching frequency is adjusted to control the power dissipation in the high-side mosfet. benefits of the new architecture include: reduced output capacitance and inductance, resulting in smaller printed-circuit board (pcb) area and lower cost.
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers ______________________________________________________________________________________ 11 csa a = 17.5v/v cssn cssp gm = 2.8 a/mv iinp gms csin csip gmi iset 26mv charger shutdown cell select logic batt v aa vctl gmv cc lowest voltage clamp csi 60mv pwm filter dhi dlo pgnd lx bst level shift high-side driver low-side driver ccmp imin imax izx 10mv ovp dc-dc converter 110mv 10mv bdiv bdiv vctl + 100mv 5.4v linear regulator 4.2v reference dcin ldo v aa power fail ldo gnd batt v aa /2 acok ldo acin MAX17005 max17006 max17015 csa a = 17.5v/v figure 2. functional diagram the MAX17005/max17006/max17015 feature a volt- age-regulation loop (ccv) and two current-regulation loops (cci and ccs). the loops operate independently of each other. the ccv voltage-regulation loop moni- tors batt to ensure that its voltage never exceeds the voltage set by vctl. the cci battery charge current- regulation loop monitors current delivered to batt to ensure that it never exceeds the current limit set by iset. the charge current-regulation loop is in control as long as the battery voltage is below the set point. when the battery voltage reaches its set point, the voltage- regulation loop takes control and maintains the battery voltage at the set point. a third loop (ccs) takes control and reduces the charge current when the adapter cur- rent exceeds the input current limit. the MAX17005/max17006/max17015 have single- point compensation. the two current loops are internal- ly compensated while the voltage loop is compensated with a series rc network at cc pin. see the cc loop compensation section for the resistor and capacitor selection. a functional diagram is shown in figure 2.
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 12 ______________________________________________________________________________________ setting charge voltage the vctl input adjusts the battery-output voltage, v batt , and determines the number of cells. for 3- and 4-cell applications, use the MAX17005; for 2- and 3-cell applications, use the max17006. use the max17015 to adjust the cell number and set the cell voltage with a resistive voltage-divider from the output. based on the version of the part, the number of cells and the level of vctl should be set as in table 1: the MAX17005 and max17006 support from 4.2v/cell to 4.4v/cell, whereas the max17015 supports minimum 2.1v. the maximum voltage is determined with the dropout performance of ic. when the required voltage falls outside the range available with the MAX17005 or max17006, the max17015 should be used. the charge-voltage regulation for the MAX17005 and max17006 is calculated with the following equations: for 3-cell selection of MAX17005 and max17006, 4.2v > vctl > 2.4v: for 2- or 4-cell selection of max17006 or MAX17005, respectively, 0v < vctl < 1.8v. connect vctl to gnd or to v aa for default 4.2v/cell battery-voltage setting. for the max17015, connect vctl to gnd to set the fb regulation point to 2.1v. the charge-voltage regulation is calculated with the following equation: there are two constraints in choosing r7 and r8. the resistors cannot be too small since they discharge the battery, and they cannot be too large because fb pin consumes less than 1a of input bias current. pick r8 to be approximately 10k and then calculate r7. fb regulation error (0.5% max) and the tolerance of r7 and r8 both contribute to the error on the battery volt- age. use 0.1% feedback resistors for best accuracy. setting charge current the voltage at iset determines the voltage across cur- rent-sense resistor rs2. iset can accept either analog or digital inputs. the full-scale differential voltage between csip and csin is 80mv (8a for rs2 = 10m ) for the analog input, and 60mv (6a for rs2 = 10m ) for the digital pwm input. when the MAX17005/max17006/max17015 power up and the charger is ready, if there is no clock edge with- in 20ms, the circuit assumes iset is an analog input, and disables the pwm filter block. to configure the charge current, force the voltage on iset according to the following equation: the input range for iset is from 0 to v aa /2. to shut down the charger, pull iset below 26mv. if there is a clock edge on iset within 20ms, the pwm filter is enabled and iset accepts digital pwm input. the pwm filter has a dac with 8-bit resolution that cor- responds to equivalent v csip-csin steps. i mv rs v v chg iset aa = 240 2 vv rr r chg reg fb setpoint __ = + 87 8 vv v cell vctl =+ 42 6 . vv vv cell vctl =+ ? 42 42 6 . . version no. of cells level MAX17005 3 2.4v < vctl < 4.2v MAX17005 4 0v < vctl < 1.8v max17006 2 0v < vctl < 1.8v max17006 3 2.4v < vctl < 4.2v max17015 sets fb vctl = gnd or vctl = v aa table 1. cell configuration csin fb battery c out r7 r8 max17015 figure 3. max17015 charge-voltage regulation feedback network
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers ______________________________________________________________________________________ 13 the pwm filter accepts the digital signal with a frequency from 128hz to 500khz. zero duty cycle shuts down the MAX17005/max17006/max17015, and 99.5% duty cycle corresponds to full scale (60mv) across csip and csin. choose a current-sense resistor (rs2) to have a suffi- cient power-dissipation rating to handle the full-charge current. the current-sense voltage can be reduced to minimize the power-dissipation period. however, this can degrade accuracy due to the current-sense amplifi- ers input offset (0.25mv typ). see typical operating characteristics to estimate the charge-current accuracy at various set points. setting input-current limit the total input current, from a wall adapter or other dc source, is the sum of the system supply current and the current required by the charger. when the input current exceeds the set input-current limit, the controller decreases the charge current to provide priority to sys- tem load current. system current normally fluctuates as portions of the system are powered up or down. the input-current-limit circuit reduces the power require- ment of the ac wall adapter, which reduces adapter cost. as the system supply rises, the available charge current drops linearly to zero. thereafter, the total input current can increase without limit. the total input current is the sum of the device supply cur- rent, the charger input current, and the system load cur- rent. the total input current can be estimated as follows: where is the efficiency of the dc-to-dc converter (typically 85% to 95%). in the MAX17005/max17006/max17015, the voltage across cssp and cssn is constant at 60mv. choose the current-sense resistor, rs1, to set the input current limit. for example, for 4a input current limit, choose rs1 = 15m . for the input current-limit settings, which cannot be achievable with standard sense resistor val- ues, use a resistive voltage-divider between cssp and cssn to tune the setting (figure 4). to minimize power dissipation, first choose rs1 according to the closest available value. for conve- nience, choose ra = 6k and calculate rb from the above equation. choose a current-sense resistor (rs1) to have a suffi- cient power rating to handle the full system current. the current-sense resistor can be reduced to improve effi- ciency, but this degrades accuracy due to the current- sense amplifiers input offset (0.15mv typ). see typical operating characteristics to estimate the input current- limit accuracy at various set points. automatic power-source selection the MAX17005/max17006/max17015 use an external charge pump to drive the gate of an n-channel adapter selection switch (n3 and q1a). in figure 1, when the adapter is present, bst is biased 5v above v adapter so that n3 and q1a are on, and q1b is off. as long as the adapter is present, even though the charger is off, the power stage forces a refresh pulse to the bst charge pump every 5ms. when the adapter voltage is removed, the charger stops generating bst refresh pulses and n4 forces n2 off, q1b turns on and supplies power to the system from the battery. in figure 1, d1 must have low forward-voltage drop and low reverse-leakage current to ensure sufficient gate drive at n3 and q1a. a 100ma, low reverse-leakage schottky diode is the right choice. analog input current-monitor output use iinp to monitor the system-input current, which is sensed across cssp and cssn. the voltage at iinp is proportional to the input current: where i input is the dc current supplied by the ac adapter, g iinp is the transconductance of the sense amplifier (2.8 ma/v typ), and r iinp is the resistor con- nected between iinp and ground. typically, iinp has a 0v to 3.5v output voltage range. leave iinp unconnect- ed when not used. i v rs g r input iinp iinp iinp = 1 i mv rs rb ra input limit _ () =+ 60 1 1 ii iv v input load charge battery in =+ cssp cssn rs1 ra rb MAX17005/max17006/max17015 figure 4. input current-limit fine tuning
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 14 ______________________________________________________________________________________ iinp can also be used to monitor battery discharge cur- rent (see figure 5). in the max17015, when the adapter is absent, drive iset above 1v to enable iinp during battery discharge. when the adapter is reinserted, iset must be released to the correct control level within 300ms. ac adapter detection the MAX17005/max17006/max17015 include a hys- teretic comparator that detects the presence of an ac power adapter. when acin is lower than 2.1v, the open-drain acok output becomes high impedance. connect a 10k pullup resistance between ldo and acok . use a resistive voltage-divider from the adapters output to the acin pin to set the appropriate detection threshold. select the resistive voltage-divider so that the voltage on acin does not to exceed its absolute maximum rating (6v). ldo regulator and v aa an integrated low-dropout (ldo) linear regulator pro- vides a 5.4v supply derived from dcin, and delivers over 40ma of load current. do not use the ldo to external loads greater than 10ma. the ldo powers the gate drivers of the n-channel mosfets. see the mosfet drivers section. bypass ldo to pgnd with a 4.7f ceramic capacitor. v aa is 4.2v reference sup- plied by dcin. v aa biases most of the control circuitry, and should be bypassed to gnd with a 1f or greater ceramic capacitor. operating conditions the MAX17005/max17006/max17015 have the following operating states: ? adapter present: when dcin is greater than 8.7v, the controller detects the adapter. in this condition, both the ldo and v aa turn on and battery charging is allowed: a) charging: the total MAX17005/max17006/ max17015 quiescent current when charging is 3ma (max) plus the current required to drive the mosfets. b) not charging: to disable charging drive iset below 26mv. when the adapter is present and charging is disabled, the total adapter quiescent current is less than 1.5ma and the total battery quiescent current is less than 60a. the charge pump still operates. ? adapter absent (power fail): when v dcin is less than v csin + 120mv, the dc-dc converter is in dropout. the charger detects the dropout condition and shuts down. the MAX17005/max17006/max17015 allow charging under the following conditions: ? dcin > 7.5v, ldo > 4v, v aa > 3.1v ?v dcin > v csin + 420mv (300mv falling hysteresis) ?v iset > 45mv or pwm detected ____________________dc-dc converter the MAX17005/max17006/max17015 employ a syn- chronous step-down dc-dc converter with an n-chan- nel high-side mosfet switch and an n-channel low-side synchronous rectifier. the charger features a controlled inductor current-ripple architecture, current- mode control scheme with cycle-by-cycle current limit. the controllers off-time (t off ) is adjusted to keep the high-side mosfet junction temperature constant. in this way, the controller switches faster when the high- side mosfet has available thermal capacity. this allows the inductor current ripple and the output-volt- age ripple to decrease so that smaller and cheaper components can be used. the controller can also oper- ate in discontinuous conduction mode for improved light-load efficiency. bst cssp cssn dhi lx rs1 15m battery adapter c4 0.1 f r6 50k c in n1 q1b system load d1 q1a c7 10nf max17015 figure 5. current-monitoring design battery discharge
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers ______________________________________________________________________________________ 15 the operation of the dc-to-dc controller is determined by the following five comparators as shown in the func- tional diagram in figures 2 and 6: ? the imin comparator triggers a pulse in discontinu- ous mode when the accumulated error is too high. imin compares the control signal (lvc) against 10mv (referred at v csip - v csin ). when lvc is less than this threshold, dhi and dlo are both forced low. indirectly, imin sets the peak inductor current in discontinuous mode. ? the ccmp comparator is used for current-mode regulation in continuous-conduction mode. ccmp compares lvc against the inductor current. the high-side mosfet on-time is terminated when the csi voltage is higher than lvc. ? the imax comparator provides a secondary cycle- by-cycle current limit. imax compares csi to 110mv (corresponding to 11a when rs2 = 10m ). the high-side mosfet on-time is terminated when the current-sense signal exceeds 11a. a new cycle cannot start until the imax comparators output goes low. ? the zcmp comparator provides zero-crossing detec- tion during discontinuous conduction. zcmp com- pares the current-sense feedback signal to 1a (rs2 = 10m ). when the inductor current is lower than the 1a threshold, the comparator output is high, and dlo is turned off. ? the ovp comparator is used to prevent overvoltage at the output due to battery removal. ovp com- pares batt against the vctl. when batt is 100mv/cell above the set value, the ovp compara- tor output goes high, and the high-side mosfet on-time is terminated. dhi and dlo remain off until the ovp condition is removed. r q q s off-time one shot 11a 1a 1a csi lvc off-time compute cssp bdiv set point + 100mv csin dl driver dh driver ovp imax ccmp imin zcmp figure 6. dc-dc converter functional diagram
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 16 ______________________________________________________________________________________ cc, cci, ccs, and lvc control blocks the MAX17005/max17006/max17015 control input current (ccs control loop), charge current (cci control loop), or charge voltage (cc control loop), depending on the operating condition. the three control loops, cc, cci, and ccs are brought together internally at the lowest voltage clamp (lvc) amplifier. the output of the lvc amplifier is the feedback control signal for the dc-dc controller. the minimum voltage at the cc, cci, or ccs appears at the output of the lvc amplifier and clamps the other control loops to within 0.3v above the control point. clamping the other two control loops close to the lowest control loop ensures fast transition with minimal overshoot when switching between differ- ent control loops (see the compensation section). the ccs and cci loops are compensated internally, and the cc loop is compensated externally. continuous-conduction mode with sufficiently large charge current, the MAX17005/ max17006/max17015s inductor current never crosses zero, which is defined as continuous-conduction mode. the controller starts a new cycle by turning on the high- side mosfet and turning off the low-side mosfet. when the charge-current feedback signal (csi) is greater than the control point (lvc), the ccmp com- parator output goes high and the controller initiates the off-time by turning off the high-side mosfet and turn- ing on the low-side mosfet. the operating frequency is governed by the off-time and is dependent upon v csin and v dcin . the on-time can be determined using the following equation: where: the switching frequency can then be calculated: at the end of the computed off-time, the controller initi- ates a new cycle if the control point (lvc) is greater than 10mv (v csip - v csin referred), and the charge current is less than the cycle-by-cycle current limit. restated another way, imin must be high, imax must be low, and ovp must be low for the controller to initi- ate a new cycle. if the peak inductor current exceeds imax comparator threshold or the output voltage exceeds the ovp threshold, then the on-time is termi- nated. the cycle-by-cycle current limit effectively pro- tects against overcurrent and short-circuit faults. if during the off-time the inductor current goes to zero, the zcmp comparator output pulls high, turning off the low-side mosfet. both the high- and low-side mosfets are turned off until another cycle is ready to begin. zcomp causes the MAX17005/max17006/ max17015 to enter into the discontinuous conduction mode (see the discontinuous conduction section). discontinuous conduction the MAX17005/max17006/max17015 can also operate in discontinuous conduction mode to ensure that the inductor current is always positive. the MAX17005/ max17006/max17015 enter discontinuous conduction mode when the output of the lvc control point falls below 10mv (referred at v csip - v csin ). for rs2 = 10m , this corresponds to a peak inductor current of 1a. in discontinuous mode, a new cycle is not started until the lvc voltage rises above imin. discontinuous mode operation can occur during conditioning charge of overdischarged battery packs, when the charge cur- rent has been reduced sufficiently by the ccs control loop, or when the charger is in constant-voltage mode with a nearly full battery pack. compensation the charge voltage, charge current, and input current- limit regulation loops are compensated separately. the charge current and input current-limit loops, cci and ccs, are compensated internally, whereas the charge voltage loop is compensated externally at cc. f tt sw on off = + 1 i vt l ripple batt off = t li vv on ripple dcin batt = ?
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers ______________________________________________________________________________________ 17 cc loop compensation the simplified schematic in figure 7 is sufficient to describe the operation of the controllers voltage loop, cc. the required compensation network is a pole-zero pair formed with c cc and r cc . the zero is necessary to compensate the pole formed by the output capacitor and the load. r esr is the equivalent series resistance (esr) of the charger output capacitor (c out ). r l is the equivalent charger output load, where r l = v batt / i chg . the equivalent output impedance of the gmv amplifier, r ogmv , is greater than 10m . the voltage- amplifier transconductance, gmv = 0.125a/mv. the dc-dc converter transconductance is dependent upon charge current-sense resistor rs2: where a csi = 20, and rs2 = 10m in the typical appli- cation circuits, so gm out = 5a/v. the loop transfer function is given by: the poles and zeros of the voltage-loop transfer function are listed from lowest frequency to highest frequency in table 2. near crossover, c cc is much lower impedance than r ogmv . since c cc is in parallel with r ogmv, c cc domi- nates the parallel impedance near crossover. additionally, r cc is much higher impedance than c cc and dominates the series combination of r cc and c cc , so: c out is also much lower impedance than r l near crossover so the parallel impedance is mostly capaci- tive and: r sc r sc l out l out () 1 1 + ? rscr sc r r ogmv cc cc cc ogmv cc + + ? () () 1 1 ltf r gmv r sc r = + gm out l ogmv out esr (1 ) )( ) ()() 1 11 + + + sc r sc r sc r cc cc cc ogmv out l gm = out 1 2 ars csi name equation description ccv pole lowest frequency pole created by c cv and gmvs finite output resistance. ccv zero voltage-loop compensation zero. if this zero is at the same frequency or lower than output pole f p_out , the loop-transfer function approximates a single-pole response near the crossover frequency. choose c cv to place this zero at least one decade below crossover to ensure adequate phase margin. output pole output pole formed with the effective load resistance r l and the output capacitance c out . r l influences the dc gain but does not affect the stability of the system or the crossover frequency. output zero output esr zero. this zero can keep the loop from crossing unity gain if f z_out is less than the desired crossover frequency; therefore, choose a capacitor with an esr zero greater than the crossover frequency. table 2. cc loop poles and zeros f rc pcv ogmv cc _ = 1 2 f rc zcv cc cc _ = 1 2 f rc pout lout _ = 1 2 f rc zout esr out _ = 1 2 gm out batt r esr c out r l vctl r ogmv r cc c cc cc gmv figure 7. cc loop diagram
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 18 ______________________________________________________________________________________ if r esr is small enough, its associated output zero has a negligible effect near crossover and the loop-transfer- function can be simplified as follows: setting ltf = 1 to solve for the unity-gain frequency yields: for stability, choose a crossover frequency lower than 1/10 the switching frequency (f osc) . for example, choose a crossover frequency of 50khz and solve for r cc using the component values listed in figure 1 to yield r cc = 3k : gmv = 0.125a/mv gm out = 5a/v c out = 4.7f f osc_cv = 600khz r l = 0.2 f co_cv = 50khz to ensure that the compensation zero adequately can- cels the output pole, select f z_cv f p_out : c cc (r l /r cc ) x c out c cc 300pf (assuming 2 cells and 2a maximum charge current). figure 8 shows the bode plot of the voltage-loop- frequency response using the values calculated above. mosfet drivers the dhi and dlo outputs are optimized for driving moderate-sized power mosfets. the mosfet drive capability is the same for both the low-side and high- sides switches. this is consistent with the variable duty factor that occurs in the notebook computer environ- ment where the battery voltage changes over a wide range. there must be a low-resistance, low-inductance path from the dlo driver to the mosfet gate to pre- vent shoot-through. otherwise, the sense circuitry in the MAX17005/max17006 interpret the mosfet gate as off while there is still charge left on the gate. use very short, wide traces measuring 10 to 20 squares or fewer (1.25mm to 2.5mm wide if the mosfet is 25mm from the device). unlike the dlo output, the dhi output uses a 50ns (typ) delay time to prevent the low-side mosfet from turning on until dhi is fully off. the same consider- ations should be used for routing the dhi signal to the high-side mosfet. the high-side driver (dhi) swings from lx to 5v above lx (bst) and has a typical impedance of 1.5 sourcing and 0.8 sinking. the strong high-side mosfet driver eliminates most of the power dissipation due to switch- ing losses. the low-side driver (dlo) swings from ldo to ground and has a typical impedance of 3 sinking and 3 sourcing. this helps prevent dlo from being pulled up when the high-side switch turns on due to capacitive coupling from the drain to the gate of the low-side mosfet. this places some restrictions on the mosfets that can be used. using a low-side mosfet with smaller gate-to-drain capacitance can prevent these problems. design procedure mosfet selection choose the n-channel mosfets according to the maxi- mum required charge current. the mosfets must be able to dissipate the resistive losses plus the switching losses at both v dcin(min) and v dcin(max) . for the high-side mosfet, the worst-case resistive power losses occur at the maximum battery voltage and minimum supply voltage: pd high side v v i cond batt max dcin min chg () () () = 2 r ds on () r cf gmv gm k cc out co cv out = ? 2 3 _ fgmg r c co cv out mv cc out _ = 2 ltf gm r sc g out cc out mv = frequency (hz) magnitude (db) phase (degrees) 100k 10k 1k 100 10 1 -20 0 20 40 60 80 -40 -90 -45 0 -135 0.1 1m mag phase figure 8. cc loop response
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers ______________________________________________________________________________________ 19 generally, a low gate charge high-side mosfet is pre- ferred to minimize switching losses. however, the r ds(on) required to stay within package power dissi- pation often limits how small the mosfet can be. the optimum occurs when the switching losses equal the conduction losses. high-side switching losses do not usually become an issue until the input is greater than approximately 15v. calculating the power dissipation in n1 due to switching losses is difficult since it must allow for difficult quantifying factors that influence the turn-on and turn-off times. these factors include the internal gate resistance, gate charge, threshold volt- age, source inductance, and pcb layout characteris- tics. the following switching-loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including a verifica- tion using a thermocouple mounted on n1: where t trans is the drivers transition time and can be calculated as follows: i gsrc and i gsnk are the peak gate-drive source/sink current (3 sourcing and 0.8 sinking, typically). the MAX17005/max17006/max17015 control the switching frequency as shown in the typical operating characteristics . the following is the power dissipated due to high-side n-channel mosfets output capacitance (c rss ): the following high-side mosfets loss is due to the reverse-recovery charge of the low-side mosfets body diode: ignore pd qrr (highside) if a schottky diode is used parallel to a low-side mosfet. the total high-side mosfet power dissipation is: switching losses in the high-side mosfet can become an insidious heat problem when maximum ac adapter voltages are applied. if the high-side mosfet chosen for adequate r ds(on) at low-battery voltages becomes hot when biased from v dcin(max) , consider choosing another mosfet with lower parasitic capacitance. for the low-side mosfet (n2), the worst-case power dissipation always occurs at maximum input voltage: the following additional loss occurs in the low-side mosfet due to the body diode conduction losses: the total power low-side mosfet dissipation is: these calculations provide an estimate and are not a substitute for breadboard evaluation, preferably including a verification using a thermocouple mounted on the mosfet. inductor selection the selection of the inductor has multiple trade-offs between efficiency, transient response, size, and cost. small inductance is cheap and small, and has a better transient response due to higher slew rate; however, the efficiency is lower because of higher rms current. high inductance results in lower ripple so that the need of the output capacitors for output voltage ripple goes low. the MAX17005/max17006/max17015 combine all the inductor trade-offs in an optimum way by controlling switching frequency. high-frequency operation permits the use of a smaller and cheaper inductor, and conse- quently results in smaller output ripple and better tran- sient response. the charge current, ripple, and operating frequency (off-time) determine the inductor characteristics. for optimum efficiency, choose the inductance according to the following equation: where k = 35ns/v. l kv ilir in chg max = 2 4 pd ls pd ls pd ls total cond bdy () () () + pd ls i v bdy peak () . . = 005 04 pd ls v v i cond batt min cssp max ch () () () =? ? ? ? ? ? ? 1 g gdson r 2 () pd hs pd hs pd hs total cond sw () () () + () () ++ pd hs pd hs crss qrr pd hs qv f qrr rr cssp sw () = 2 2 pd hs vcf crss cssp rss sw () 2 2 t ii qq trans gsrc gsnk gd gs =+ ? ? ? ? ? ? + () 11 pd hs t v i f sw trans cssp chg sw () = 1 2
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 20 ______________________________________________________________________________________ for optimum size and inductor current ripple, choose lir max = 0.4, which sets the ripple current to 40% the charge current and results in a good balance between inductor size and efficiency. higher inductor values decrease the ripple current. smaller inductor values save cost but require higher saturation current capabili- ties and degrade efficiency. inductor l1 must have a saturation current rating of at least the maximum charge current plus 1/2 the ripple current ( il): i sat = i chg + (1/2) il the ripple current is determined by: input capacitor selection the input capacitor must meet the ripple current requirement (i rms ) imposed by the switching currents. nontantalum chemistries (ceramic, aluminum, or os-con) are preferred due to their resilience to power- up and surge currents: the input capacitors should be sized so that the tem- perature rise due to ripple current in continuous con- duction does not exceed approximately 10 c. the maximum ripple current occurs at 50% duty factor or v dcin = 2 x v batt , which equates to 0.5 x i chg . if the application of interest does not achieve the maximum value, size the input capacitors according to the worst- case conditions. output capacitor selection the output capacitor absorbs the inductor ripple cur- rent and must tolerate the surge current delivered from the battery when it is initially plugged into the charger. as such, both capacitance and esr are important parameters in specifying the output capacitor as a filter and to ensure the stability of the dc-to-dc converter (see the compensation section.) beyond the stability requirements, it is often sufficient to make sure that the output capacitors esr is much lower than the batterys esr. either tantalum or ceramic capacitors can be used on the output. ceramic devices are preferable because of their good voltage ratings and resilience to surge currents. choose the output capacitor based on: choose k cap-bias is a derating factor of 2 for typical 25v- rated ceramic capacitors. for f sw = 800khz, i ripple = 1a, and to get v batt = 70mv, choose c out as 4.7f. if the internal resistance of battery is close to the esr of the output capacitor, the voltage ripple is shared with the battery and is less than calculated. applications information setting input current limit the input current limit should be set based on the cur- rent capability of the ac adapter and the tolerance of the input current limit. the upper limit of the input cur- rent threshold should never exceed the adapters mini- mum available output current. for example, if the adapters output current rating is 5a 10%, the input current limit should be selected so that its upper limit is less than 5a 0.9 = 4.5a. since the input current-limit accuracy of the MAX17005/max17006/max17015 is 3%, the typical value of the input current limit should be set at 4.5a/1.03 4.36a. the lower limit for input current must also be considered. for chargers at the low end of the spec, the input current limit for this example could be 4.36a 0.95 or approximately 4.14a. layout and bypassing bypass dcin with a 0.1f ceramic to ground (figure 1). n1 and n2 protect the MAX17005/max17006/ max17015 when the dc power source input is reversed. bypass v aa , cssp, and ldo as shown in figure 1. good pcb layout is required to achieve specified noise immunity, efficiency, and stable performance. the pcb layout designer must be given explicit instructions preferably, a sketch showing the placement of the power switching components and high current routing. refer to the pcb layout in the MAX17005/max17006/ max17015 evaluation kit for examples. a ground plane is essential for optimum performance. in most applica- tions, the circuit is located on a multilayer board, and full use of the four or more copper layers is recom- mended. use the top layer for high-current connec- tions, the bottom layer for quiet connections, and the inner layers for an uninterrupted ground plane. use the following step-by-step guide: 1) place the high-power connections first, with their grounds adjacent: a) minimize the current-sense resistor trace lengths, and ensure accurate current sensing with kelvin connections. b) minimize ground trace lengths in the high-current paths. c i fv k out ripple sw batt cap bias = ? 8 ii vvv v rms chg batt dcin batt dcin = ? () ? ? ? ? ? ? ? ? = il kv l in 2 4
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers ______________________________________________________________________________________ 21 c) minimize other trace lengths in the high-current paths. d) use > 5mm wide traces in the high-current paths. e) connect c in to high-side mosfet (10mm max length). f) minimize the lx node (mosfets, rectifier cath- ode, inductor (15mm max length)). keep lx on one side of the pcb to reduce emi radiation. ideally, surface-mount power components are flush against one another with their ground terminals almost touching. these high-current grounds are then connected to each other with a wide, filled zone of top-layer copper, so they do not go through vias. the resulting top-layer subground plane is connected to the normal inner-layer ground plane at the paddle. other high-current paths should also be minimized, but focusing primarily on short ground and current-sense connections eliminates about 90% of all pcb layout problems. 2) place the ic and signal components. keep the main switching node (lx node) away from sensitive analog components (current-sense traces and v aa capacitor). important: the ic must be no further than 10mm from the current-sense resistors. quiet con- nections to v aa and cc should be returned to a sep- arate ground (gnd) island. there is very little current flowing in these traces, so the ground island need not be very large. when placed on an inner layer, a siz- able ground island can help simplify the layout because the low-current connections can be made through vias. the ground pad on the backside of the package should also be connected to this quiet ground island. 3) keep the gate drive traces (dhi and dlo) as short as possible (l < 20mm), and route them away from the current-sense lines and v aa . these traces should also be relatively wide (w > 1.25mm). 4) place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. place the current-sense input filter capacitors under the part, connected directly to the gnd pin. 5) use a single-point star ground placed directly below the part at the pgnd pin. connect the power ground (ground plane) and the quiet ground island at this location.
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers 22 ______________________________________________________________________________________ 19 20 18 17 7 6 8 agnd iinp 9 dcin bst dlo pgnd dhi 1 2 v aa 45 15 14 12 11 cc vctl cssn cssp acok batt MAX17005 max17006 max17015 csip ldo 3 exposed paddle 13 acin 16 10 iset lx thin qfn 4mm x 4mm top view csin pin configuration chip information transistor count: 12,990 process: bicmos batt adapter bst cssp cssn dhi lx dlo pgnd csin csip batt battery cc vctl iset acin gnd iinp v aa ldo adapter system dcin acok MAX17005 max17006 max17015 minimal operating circuit
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers ______________________________________________________________________________________ 23 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) 24l qfn thin.eps
MAX17005/max17006/max17015 1.2mhz low-cost, high-performance chargers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 24 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2008 maxim integrated products is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .)

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